Lot sizing to reduce capacity utilization in a production process with defective items, process corrections, and rework

This paper deals with the lot sizing problem in which the key features of imperfections in a production process are explicitly modelled. These features include: process shifting to out-of-control states, detection of the out-of-control shifts, corrective actions following the detections, and the fixed setup and variable processing times of reworks. The problem is motivated by the wafer probe operation in semiconductor manufacturing. The key objective that drives the lot sizing decision is to reduce the total processing time on a critical resource. Such an objective is aimed at reducing the congestion level at this resource.