Article ID: | iaor1989392 |
Country: | Japan |
Volume: | J72-D-I |
Issue: | 3 |
Start Page Number: | 149 |
End Page Number: | 156 |
Publication Date: | Mar 1989 |
Journal: | Transactions of the Institute of Electronics, Information and Communication Engineers |
Authors: | Yoshioka Yoshio |
Keywords: | communication, design, performance, queues: theory |
This paper presents the theoretical analysis and the traffic characteristics for a new type of dataflow computer with one control unit (CU) and some processing elements (PE’s) which are connected with loop shift-registers. It is called ‘the Loop Structured Computer (LSC)’. The packet delay time in the LSC system has been solved, using queueing analysis for the CU and the PE’s. In the numerical analyses, the author has calculated the delay times versus the traffic, the maximum traffic density versus the number of PE’s and so on, discussed two suitable system configurations. One of them is of the LSC system with four or five PE’s, when the transmission rate of shift-register, defined as the number of packets transmitted by the shift-register during the mean processing time of PE, is 1. The other is of the LSC system when the number of PE’s equals the transmission rate of shift-register. [In Japanese.]