Article ID: | iaor1989391 |
Country: | Japan |
Volume: | J72-D-I |
Issue: | 2 |
Start Page Number: | 117 |
End Page Number: | 125 |
Publication Date: | Feb 1989 |
Journal: | Transactions of the Institute of Electronics, Information and Communication Engineers |
Authors: | Ishikawa Tutomu |
Keywords: | project management, quality & reliability, graphs |
This paper proposes a new universal fault-tolerant hypercube architecture. This architecture is obtained by constructing a basic fault-tolerant hypercube and expanding it using the product of graphs. The basic cube is constructed by partitioning all processing elements (PEs) into subsets with weak connectivity using the Hamming distance between PE numbers and by connecting all PEs in each subset to a spare PE through buses. This architecture can maintain the original network topology and size without the addtion of any switching hardware and can be applied to any size of hypercube. Moreover, because the number of spare PE ports is equal to or fewer than the number of original PE ports, the same kind of PE can be used for both original PEs and spares. [In Japanese]