Developing a 3D layout for wafer fabrication plants

Developing a 3D layout for wafer fabrication plants

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Article ID: iaor20071628
Country: United Kingdom
Volume: 17
Issue: 7
Start Page Number: 664
End Page Number: 677
Publication Date: Oct 2006
Journal: Production Planning and Control
Authors: , ,
Keywords: design
Abstract:

Wafer fabrication plants (FABs) are typically arranged in two dimensional (2D) layouts on a single floor. These layouts imply various constraints on the work-in-process (WIP) and the material handling systems. In contrast, automated storage/retrieval systems (AS/RS) are arranged in 3D aisles, where each aisle is served by a robotic arm that moves back and forth between the aisle's entrance point and its storage locations. This paper offers an AS/RS-based 3D layout for FABs. First, a general 3D layout design problem is formulated and a heuristic algorithm is developed to solve it. Then, the proposed layout is evaluated with respect to its 2D counterpart, and the scenarios in which the former may outperform the latter, more conventional, layout are specified. Finally, the performance of the proposed 3D layout is compared to a corresponding 2D layout through a simulation which is based on actual data taken from the semiconductor industry.

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