Modelling of semiconductor wafer fabrication systems by extended object-oriented Petri nets

Modelling of semiconductor wafer fabrication systems by extended object-oriented Petri nets

0.00 Avg rating0 Votes
Article ID: iaor20052220
Country: United Kingdom
Volume: 43
Issue: 3
Start Page Number: 471
End Page Number: 495
Publication Date: Jan 2005
Journal: International Journal of Production Research
Authors: , ,
Keywords: production
Abstract:

In this paper, extended object-oriented Petri nets (EOPNs) are proposed for the effective modelling of semiconductor wafer fabrication systems (SWFSs). To cope with their complexity in terms of the re-entrant process route and the mixed production mode, a special type of transition called main-bus gate is introduced, which may lead each kind of product to undergo every re-entrant processing stage. In addition, the hierarchical approach is also applied to cope with the complexity. An etching area that processes 0.25μm logic IC products is taken as an illustration to present the detailed modelling procedures by EOPNs, and the resulting model validates that the EOPNs may cope well with complex SWFSs modelling.

Reviews

Required fields are marked *. Your email address will not be published.