Parallelizing the dual simplex method

Parallelizing the dual simplex method

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Article ID: iaor20012444
Country: United States
Volume: 12
Issue: 1
Start Page Number: 45
End Page Number: 56
Publication Date: Dec 2000
Journal: INFORMS Journal On Computing
Authors: ,
Keywords: programming: linear
Abstract:

We study the parallelization of the steepest-edge version of the dual simplex algorithm. Three different parallel implementations are examined, each of which is derived from the CPLEX dual simplex implementation. One alternative uses PVM, one general-purpose System V shared-memory constructs, and one the PowerC extension of C on a Silicon Graphics multi-processor. These versions were tested on different parallel platforms, including heterogeneous workstation clusters, Silicon Graphics multi-processors, and an IBM SP2. We report on our computational experience.

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