Minimizing tardiness on a single processor with sequence-dependent setup times: A simulated annealing approach

Minimizing tardiness on a single processor with sequence-dependent setup times: A simulated annealing approach

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Article ID: iaor19991787
Country: United Kingdom
Volume: 25
Issue: 6
Start Page Number: 619
End Page Number: 634
Publication Date: Dec 1997
Journal: OMEGA
Authors: ,
Keywords: optimization: simulated annealing
Abstract:

In today's fast-paced Just-in-Time and mass customization manufacturing in a sequence-dependent setup environment, the challenge of making production schedules to meet due-date requirements is becoming a more complex problem. Unfortunately, much of the research on operations scheduling problems has either ignored setup times or assumed that setup times on each machine are independent of the job sequence. This paper considers the problem of minimizing tardiness, a common measure of due-date performance, in a sequence-dependent setup environment. Simulated annealing was used to solve the sequencing problem, and its performance was compared with random search. Our experimental results show that the algorithm can find a good solution fairly quickly, and thus can rework schedules frequently to react to variations in the schedule. The algorithm is invaluable for ‘on-line’ production scheduling and ‘last-minute’ changes to production schedule. The results of this research also suggest ways in which more complex and realistic job shop environments, such as multiple machines with a higher number of jobs in the sequence, and other scheduling objectives can be modeled. This research also investigates computational aspects of simulated annealing in solving complex scheduling problems.

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