Operations research in the high-level synthesis of integrated circuits

The acceptance of high-level synthesis tools and methodologies by the design engineers depends on their efficiency in producing circuits with small silicon areas and high operating speeds. This paper shows how this efficiency can be achieved through the use of several operations research techniques applied to the many optimization problems that must be solved. These include: shortest path algorithms, integer programming techniques applied to silicon area minimization, force directed scheduling to optimize the number of operators and cost/speed trade-offs of logical gates. This paper presents several examples providing an operations research solution to each of them.