Kolodny Avinoam

Avinoam Kolodny

Information about the author Avinoam Kolodny will soon be added to the site.
Found 2 papers in total
The complexity of VLSI power‐delay optimization by interconnect resizing
The complexity of VLSI power‐delay optimization by interconnect resizing
2012
The lithography used for 32 nanometers and smaller VLSI process technologies restricts...
On VLSI interconnect optimization and linear ordering problem
On VLSI interconnect optimization and linear ordering problem
2011
Some well‐known VLSI interconnect optimizations problems for timing, power and...
Papers per page: