Article ID: | iaor201525598 |
Volume: | 10 |
Issue: | 1 |
Start Page Number: | 21 |
End Page Number: | 35 |
Publication Date: | Oct 2014 |
Journal: | International Journal of Energy Technology and Policy |
Authors: | Shrivastava Ashish, Singh Bhim |
Keywords: | simulation, design |
This paper deals with the analysis, design and simulation of power factor corrected (PFC), low crest factor (CF) electronic ballast for a compact fluorescent lamp (CFL). The proposed electronic ballast employs a Cuk buck‐boost AC‐DC converter as a power factor regulator (PFR) operating in discontinuous conduction mode (DCM). In the proposed electronic ballast, a half bridge series resonant inverter (SRI) is used to convert DC voltage into high frequency AC voltage. The design, modelling and simulation of this topology are carried out in MATLAB‐Simulink software for an 18 W, 220 V, 50 Hz CFL. The zero voltage switching (ZVS) is used to reduce the switching losses at high operating frequency of 60 kHz. The power quality indices such as total harmonic distortion of AC mains current (THDi), power factor (PF), displacement power factor (DPF) and crest factor (CF) are estimated to study the behaviour of proposed electronic ballast.