IPM based sparse LP solver on a heterogeneous processor

IPM based sparse LP solver on a heterogeneous processor

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Article ID: iaor20123905
Volume: 9
Issue: 2
Start Page Number: 287
End Page Number: 299
Publication Date: May 2012
Journal: Computational Management Science
Authors: ,
Keywords: heuristics, computational analysis: parallel computers
Abstract:

We present the parallelization of a linear programming solver using a primal‐dual interior point method on one of the heterogeneous processors, namely the Cell BE processor. Focus is given to Cholesky factorization as it is the most computationally expensive kernel in interior point methods. To make it easier to develop and port to other heterogeneous systems, we propose a two‐phase implementation procedure where we first develop a shared‐memory multithreaded application that executes only on the main processor, and then offload the compute‐intensive tasks to execute on the synergistic processors (Cell accelerator cores). We used parent–child supernode amalgamation to increase sizes of the blocks, but we noticed that the existence of many small blocks cause significant performance degradation. To reduce the overhead of small blocks, we extend the block fan‐out algorithm such that small blocks are aggregated into large blocks without adding extra zeros. We also use another type of amalgamation that can merge any two consecutive supernodes and use it to avoid having very small blocks in a composed block. The suggested block aggregation method is able to speedup the whole LP solver of up to 2.5 when compared to using parent–child supernode amalgamation alone.

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