Heuristic approaches for master planning in semiconductor manufacturing

Heuristic approaches for master planning in semiconductor manufacturing

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Article ID: iaor20117156
Volume: 39
Issue: 3
Start Page Number: 479
End Page Number: 491
Publication Date: Mar 2012
Journal: Computers and Operations Research
Authors: ,
Keywords: heuristics, planning, combinatorial optimization, programming: integer
Abstract:

In this paper, we propose heuristic approaches for solving master planning problems that arise in semiconductor manufacturing networks. The considered problem consists of determining appropriate wafer quantities for several products, facilities, and time periods by taking demand fulfillment (i.e., confirmed orders and forecasts) and capacity constraints into account. In addition, fixed costs are used to reduce production partitioning. A mixed‐integer programming (MIP) formulation is presented and the problem is shown to be NP‐hard. As a consequence, two heuristic procedures are proposed: a product based decomposition scheme and a genetic algorithm. The performance of both heuristics is assessed using randomly generated test instances. It turns out that the decomposition scheme is able to produce high‐quality solutions, while the genetic algorithm achieves results with reasonable quality in a short amount of time.

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