A note on system-on-chip test scheduling formulation

While many different formulations of the embedded core test scheduling problem (ECTSP) have been proposed in test literature recently, a single unified presentation of ECTSP in terms of conventional scheduling patterns has been lacking. There exists a large body of literature on multi-processor scheduling which can be directly applied to ECTSP; in this paper the author presents an introduction to scheduling notation and demonstrates the mapping between many important test scheduling problems like power-constrained, precedence constrained, and defect-oriented scheduling to conventional multi-processor job scheduling problems. Two examples are presented to illustrate this mapping. This unified presentation should make the existing body of knowledge in Operations Research scheduling research easily accessible to test engineers and test automation tool developers.