A new heuristic for minimal makespan in flow shops with multiple processors and no intermediate storage

A new heuristic for minimal makespan in flow shops with multiple processors and no intermediate storage

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Article ID: iaor20051301
Country: Netherlands
Volume: 152
Issue: 1
Start Page Number: 96
End Page Number: 114
Publication Date: Jan 2004
Journal: European Journal of Operational Research
Authors: ,
Keywords: heuristics
Abstract:

The general scheduling problem in a flow shop with multiple processors (FSMP) is characterized by the processing of n jobs through m stages with one or more processors at each stage. The assumption is generally made that there is unlimited storage available between stages. This paper changes that assumption so there is no intermediate storage (NIS) and blocking between stages. This paper is concerned with the minimization of the makespan in an FSMP with no intermediate storage (FSMP-NIS) with identical multiple processors at each stage. This research focuses on the development of a new heuristic for minimizing the makespan in an FSMP-NIS to be used in, but not limited to, this environment. Experiments are performed to test the effectiveness of the new heuristic and other comparison heuristics for smal and large-sized problems. Results indicate that the new heuristic performs statistically better (over the data used) than other commonly used heuristics.

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