Article ID: | iaor19901116 |
Country: | United States |
Volume: | 37 |
Issue: | 2 |
Start Page Number: | 245 |
End Page Number: | 262 |
Publication Date: | Apr 1990 |
Journal: | Naval Research Logistics |
Authors: | Chinneck John W. |
A processing network contains at least one processing node; such a node is constrained by fixed ratios of flow in its terminals. Though fast solution algorithms are available, processing network models are difficult to formulate in the first place so that meaningful results are obtained. Until now, there have been no automated aids for use during the model-building phase. This article develops the theory of model viability and presents the first such aid: an algorithm for the identification and localization of a class of errors which can occur during model formulation.