A heuristic procedure for makespan minimization in job shops with multiple identical processors

A heuristic procedure for makespan minimization in job shops with multiple identical processors

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Article ID: iaor20012754
Country: Netherlands
Volume: 35
Issue: 3/4
Start Page Number: 399
End Page Number: 402
Publication Date: Dec 1998
Journal: Computers & Industrial Engineering
Authors: ,
Abstract:

Scheduling has been and continues to be a major issue in production planning. Job shop scheduling is one area where a considerable amount of research has been and continues to be pursued. Usual emphasis is on one machine per work center job shop scheduling. There appears to be very limited literature available on scheduling a job shop problem which requires scheduling of n jobs in m machine centers where each machine center may have k number of identical processors (though the number of identical processors may vary from one machine center to next). We discuss here, the problem of minimize of the makespan for such a job shop arrangement. The problem can be represented by the symbol m × n × k.

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