Article ID: | iaor20011372 |
Country: | United States |
Volume: | 14 |
Issue: | 6 |
Start Page Number: | 417 |
End Page Number: | 423 |
Publication Date: | Nov 1998 |
Journal: | Quality and Reliability Engineering International |
Authors: | Kim T., Kuo W. |
Keywords: | design, maintenance, repair & replacement |
This paper presents a conceptual model of burn-in decision making which gives an optimal burn-in time for semiconductor devices and describes how burn-in affects total yield and reliability. For the gate oxide of integrated circuits we consider four burn-in policies: no burn-in, wafer-level burn-in only, package-level burn-in only and wafer-level burn-in prior to package-level burn-in. A decision-making model to minimize cost is given for each burn-in policy. Burn-in time is strongly limited by the cost factor and reliability requirements. In order to reduce the cost incurred in burn-in, a short test time and small test samples are recommended.