Minimizing the flow time and the lateness on a processor with a varying speed

Minimizing the flow time and the lateness on a processor with a varying speed

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Article ID: iaor2000446
Country: Italy
Volume: 27
Issue: 83
Start Page Number: 51
End Page Number: 58
Publication Date: Jan 1997
Journal: Ricerca Operativa
Authors:
Keywords: manufacturing industries, scheduling
Abstract:

In the paper the problems of scheduling on a single processor with varying speed are investigated. The speed of the processor depends on the number of already completed jobs and is described by a function. Presented results concern the criteria related to the flow time and the lateness. Some open problems are also discussed.

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