| Article ID: | iaor19971094 |
| Country: | Netherlands |
| Volume: | 18 |
| Issue: | 4 |
| Start Page Number: | 157 |
| End Page Number: | 165 |
| Publication Date: | Feb 1996 |
| Journal: | Operations Research Letters |
| Authors: | Lustig Irvin J., Rothberg Edward |
| Keywords: | computational analysis: supercomputers |
This paper describes the parallelization of an ‘industrial strength’ linear programming package. The present parallel version of CPLEX Barrier, running on a Silicon Graphics Power Challenge shared-memory multiprocessor, provides dramatic performance improvements over sequential methods on a wide range of practical, realistic linear programming problems. The resulting software/hardware combination can provide sustained performance of as much as 2.4Gflops.